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Autonomous Avionics Research

Built for
real-time
autonomy.

SLYR is a dual-compute avionics platform that separates deterministic flight control from AI-assisted decision making — enforced at the hardware level.

Research & Education STM32H7 Raspberry Pi 5 UAV
slyr-core — boot v0.4.2-dev
§ 01 — Design Rationale
Research Context

The cost of
tight coupling.

Most UAV systems bind flight control and autonomy into a single processing loop. When AI inference stutters under load, the aircraft stutters. Latency in one layer becomes instability in another.

Core Thesis

SLYR isolates safety-critical execution from adaptive reasoning at the silicon level. The STM32 flight kernel never waits on the Pi. Safety becomes structural — not a runtime policy.

220mm FRAME MTR·FL MTR·FR MTR·RL MTR·RR FLIGHT CTRL CAM SLYR·UAV·v2·REV·A
§ 02 — System Design
Architecture

Dual-layer
hardware separation.

Strict isolation of deterministic real-time execution from adaptive reasoning. Every command passing from the autonomy layer is validated, clamped, and smoothed before it reaches the flight kernel.

[ Sensors ]
IMU · GPS · Barometer · Optical Flow
[ STM32 Flight Kernel ] ~1 kHz real-time loop
State Estimation · Attitude & Rate PID · Motor Mixing (DShot) · Failsafe
[ Autonomy Layer — Raspberry Pi 5 ]
Waypoint Nav · Obstacle Avoidance · Mission Planning · SLM Decision Engine (int8)
[ Behavior Manager ]
Command Shaping · Rate Limiting · Constraint Enforcement
[ STM32 Execution ]
All inputs validated · clamped · smoothed before motor application
§ 03 — Hardware Specification
Hardware

System
specifications.

Component selection prioritises determinism and power efficiency, keeping the real-time kernel isolated from variable AI workloads.

Flight Controller
STM32H7 · ~1 kHz control loop
Compute Board
Raspberry Pi 5 · 8 GB RAM
IMU
ICM-42688-P · 1 kHz sampling
Barometer
BMP388 · nominal
Motor Protocol
DShot (bidirectional)
Comm Interface
UART / SPI · CRC validated
Decision Engine
SLM · int8 quantised · 12M params
Watchdog
Heartbeat · autonomous failsafe
Status
v0.4.2-dev · active research
STM32H7 480MHz · LQFP144 1MB FLASH · 1MHz ADC FLIGHT CONTROLLER · REV·B BCM2712 2.4GHz · 4-CORE A76 VideoCore VII GPU 8GB LPDDR5 USB3 USB3 GbE RASPBERRY PI 5 · AUTONOMY LAYER
§ 04 — Project Timeline
Timeline

From blank page
to maiden flight.

Every crash, redesign, and breakthrough — scroll to trace the full journey.

0%
INITIALIZING
§ 05 — Project Team
Contributors

The people
behind SLYR.

A small, focused team pushing the boundaries of autonomous avionics research.

emtypyie
Lead Systems Architect
Oversees hardware architecture, dual-compute separation design, and PCB layout. Initiated the SLYR project in April 2025.
@myrachane
Bynatics
Backend Lead
Owns the STM32H7 flight kernel, real-time control loop implementation, and DShot motor protocol integration.
@bynatics
Abhranil Paul
Electronics
Responsible for the SLM decision engine, int8 quantisation pipeline, and the electronic systems.
@nilabhranil
Jaxa
System Designs
Responsible for the System design and functions.
@jaxa
Sudipto Routh
not assigned
Responsible for someting we dont know
@routh
Electronics
@soon
§ 06 — R&D Funding
Financials

Self-funded
from scratch.

Every component, PCB spin, and crash test has been funded out-of-pocket.

Total Invested
0
of ₹30,000+ estimated total
Calculating...
All figures are self-funded R&D expenditure.
No external investors. No grants. Pure grit.
PCB Fabrication & Components
₹900
Esp32s
₹600
Sensors (IMU, Baro, GPS)
₹2,400
Frame, Motors & ESCs
₹3,900
Test Crash Replacement Parts
₹480
Tools, Misc & Consumables
~₹500
Total Spent
₹8,780
Remaining ₹18,000+ covers STM32H7 dev boards,
v2 PCB spins, RF modules & final test flights.
§ 07 — Field Notes & Research Log
Blog

From the
bench & beyond.

Raw notes, build logs, and research findings from the repo.

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